The physical design of VLSI-chips is a very complex optimization problem,
which is normally solved in various sub-steps.
Because there are many interdependencies between these sub-steps it is
recommendable to combine some of them.
Due to the complexity only heuristic approaches like genetic algorithms
can be used.
The main problem when solving `real' applications with genetic algorithms
is to find a useful genotype encoding for a single solution.
Our approach uses a binary tree with additional information for each node.
The main advantage here is the straightforward implementation of the
genetic operators.
In the following there is a detailed description given of the classical way of solving the physical design of VLSI-chips. After this our genetic algorithm is described, which combines most of the typical sub-steps. At the end some first results are presented and some plans for extensions are given.